/*
 *  Copyright 2003 by Spectrum Digital Incorporated.
 *  All rights reserved. Property of Spectrum Digital Incorporated.
 */

/*
 *  ======== evmdm642_aic23_openCodec.c ========
 *  EVMDM642_AIC23_openCodec() implementation
 */
 
#include <evmdm642.h>
#include <evmdm642_aic23.h>
#include <csl.h>
#include <csl_i2c.h>
#include <csl_mcasp.h>

/* AIC23 handles */
MCASP_Handle EVMDM642_AIC23_hMcASP;

MCASP_ConfigGbl mcaspCfgDataGbl = {
    0x00000000, /* PFUNC -     All pins as McASP */
    0x00000001, /* PDIR  -     XMT DATA output, rest are inputs */
    0x00000000, /* DITCTL -    DIT mode disable */
    0x00000000, /* DLBCTL -    Loopback disabled */
    0x00000000  /* AMUTE  -    Never drive AMUTE */
};

MCASP_ConfigRcv mcaspCfgDataRcv = {
    0xffffffff, /* RMASK -     Use all 32 bits */
    0x000080f8, /* RFMT -      MSB first, 32-bit slots, CPU bus, 0 bit delay */
    0x00000000, /* AFSRCTL -   burst, single bit frame sync, ext FS */
    0x00000080, /* ACLKRCTL -  Sample on rising CLK, divide by 1, ext CLK */
    0x00000000, /* AHCLKRCTL - External HCLK */
    0x00000001, /* RTDM -      Slots 0-31 are active */
    0x00000000, /* RINTCTL -   No interrupts */
    0x00000000  /* RCLKCHK -   Not used */ 
};

MCASP_ConfigXmt mcaspCfgDataXmt = {
    0xffffffff, /* XMASK -     Use all 32 bits */
    0x000080f8, /* XFMT -      MSB first, 32-bit slots, CPU bus, 0 bit delay */
    0x00000000, /* AFSXCTL -   burst, single bit frame sync, ext FS */
    0x000000c0, /* ACLKXCTL -  Sample on falling CLK, divide by 1, ext CLK */
    0x00000000, /* AHCLKXCTL - External HCLK */
    0x00000001, /* XTDM -      Slots 0-31 are active */
    0x00000000, /* XINTCTL -   No interrupts */
    0x00000000  /* XCLKCHK -   Not used */
};

MCASP_ConfigSrctl mcaspCfgDataSrctl = {
    0x0000000d, /* SRCTL0 -    Transmit, active high */
    0x0000000e, /* SRCTL1 -    Receive, active high */
    0x00000000, /* SRCTL2 -    Inactive */
    0x00000000, /* SRCTL3 -    Inactive */
    0x00000000, /* SRCTL4 -    Inactive */
    0x00000000, /* SRCTL5 -    Inactive */
    0x00000000, /* SRCTL6 -    Inactive */
    0x00000000  /* SRCTL7 -    Inactive */
};

MCASP_Config mcaspCfgData = {
    &mcaspCfgDataGbl,
    &mcaspCfgDataRcv,
    &mcaspCfgDataXmt,
    &mcaspCfgDataSrctl
};

/*
 *  ======== EVMDM642_AIC23_openCodec ========
 *  Open the codec and return a codec handle
 */
EVMDM642_AIC23_CodecHandle EVMDM642_AIC23_openCodec(Int16 id, EVMDM642_AIC23_Config *Config, Int16 direction)
{
    Uint32 gblctl;
    
    /* Configure the AIC23 */
    EVMDM642_AIC23_config(id, Config);

    /* Open and configure the McASP */
    EVMDM642_AIC23_hMcASP = MCASP_open(MCASP_DEV0, MCASP_OPEN_RESET);
    MCASP_config(EVMDM642_AIC23_hMcASP, &mcaspCfgData);
    
    /* Clear transmit and receive status */
    MCASP_RSETH(EVMDM642_AIC23_hMcASP, RSTAT, 0xffff);
    MCASP_RSETH(EVMDM642_AIC23_hMcASP, XSTAT, 0xffff);

    /* Clear GBLCTL */
    gblctl = 0;
    MCASP_RSETH(EVMDM642_AIC23_hMcASP, GBLCTL, gblctl);
        
    /* Enable transmit/receive serializers */
    if ((direction & EVMDM642_AIC23_INPUT) != 0)
        gblctl |= 0x4;
    if ((direction & EVMDM642_AIC23_OUTPUT) != 0)
        gblctl |= 0x400;
    MCASP_RSETH(EVMDM642_AIC23_hMcASP, GBLCTL, gblctl);
            
    /* Enable transmit/receive state machines */
    if ((direction & EVMDM642_AIC23_INPUT) != 0)
        gblctl |= 0x8;
    if ((direction & EVMDM642_AIC23_OUTPUT) != 0)
    {
        MCASP_RSETH(EVMDM642_AIC23_hMcASP, XBUF0, 0);
        gblctl |= 0x800;
    }
    MCASP_RSETH(EVMDM642_AIC23_hMcASP, GBLCTL, gblctl);
 
    return TRUE;
}

